BS IEC 60747-8:2010+A1:2021

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Semiconductor devices. Discrete devices – Field-effect transistors

Published By	Publication Date	Number of Pages
BSI	2021	88

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Categories: 31.080.30 - Transistors, BSI

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PDF Pages	PDF Title
2	undefined
14	English CONTENTS
18	FOREWORD
20	1 Scope 2 Normative references
21	3 Terms and definitions 3.1 Types of field-effect transistors
22	3.2 General terms
24	3.3 Terms related to ratings and characteristics
26	Figures Figure 1 – Basic waveforms to specify the gate charges
28	Figure 2 – Integral times for the turn-on energy Eon and turn-off energy Eoff
29	3.4 Conventional used terms 4 Letter symbols 4.1 General 4.2 Additional general subscripts 4.3 List of letter symbols Tables Table 1 – Terms for MOSFET in this standard and the conventional used terms for the inverse diode integrated in the MOSFET
33	Figure 3 – Switching times
34	5 Essential ratings and characteristics 5.1 General 5.2 Ratings (limiting values)
35	5.3 Characteristics
46	6 Measuring methods 6.1 General 6.2 Verification of ratings (limiting values) Table 2 – Acceptance defining characteristics
47	Figure 4 – Circuit diagram for testing of drain-source voltage Figure 5 – Circuit diagram for testing of gate-source voltage
48	Figure 6 – Circuit diagram for testing of gate-drain voltage
49	Figure 7 – Basic circuit for the testing of drain current
50	Figure 8 – Circuit diagram for testing of peak drain current Figure 9 – Basic circuit for the testing of reverse drain current of MOSFETs
51	Figure 10 – Basic circuit for the testing of peak reverse drain current of MOSFETs
52	Figure 11 – Circuit diagram for verifying FBSOA
53	Figure 12 – Circuit diagram for verifying RBSOA Figure 13 – Test waveforms for verifying RBSOA
54	Figure 14 – Circuit for testing safe operating pulse duration at load short circuit
55	Figure 15 – Waveforms of gate-source voltage VGS, drain current ID and voltage VDS during load short circuit condition SCSOA
56	Figure 16 – Circuit for the inductive avalanche switching Figure 17 – Waveforms of ID, VDS and VGS during unclamped inductive switching
57	Figure 18 – Waveforms of ID, VDS and VGS for the non-repetitive avalanche switching
58	6.3 Methods of measurement Figure 19 – Circuit diagrams for the measurement drain-source breakdown voltage
59	Figure 20 – Circuit diagram for measurement of gate-source off-statevoltage and gate-source threshold voltage
60	Figure 21 – Circuit diagram for drain leakage (or off-state) current or drain cut-off current measurement
61	Figure 22 – Circuit diagram for measuring of gate cut-off current or gate leakage current
62	Figure 23 – Basic circuit of measurement for on-state resistance Figure 24 – On-state resistance
63	Figure 25 – Circuit diagram for switching time Figure 26 – Schematic switching waveforms and times
64	Figure 27 – Circuit for determining the turn-on andturn-off power dissipation and/or energy
66	Figure 28 – Circuit diagrams for the measurement gate charges
67	Figure 29 – Basic for the measurement of short-circuit input capacitance
68	Figure 30 – Basic circuit for measurement of short-circuit output capacitance (Coss)
69	Figure 31 – Circuit for measurement of reverse transfer capacitance Crss
70	Figure 32 – Circuit for measurement of internal gate resistance
71	Figure 33 – Circuit diagram for MOSFET forward recovery timeand recovered charge (Method 1) Figure 34 – Current waveform through MOSFET (Method 1)
72	Figure 35 – Circuit diagram for MOSFET forward recovery timeand recovered charge (Method 2)
73	Figure 36 – Current waveform through MOSFET (Method 2)
74	Figure 37 – Circuit diagram for the measurement of drain-source reverse voltage
75	Figure 38 – Basic circuit for the measurement of the output conductance goss (method 1: null method)
76	Figure 39 – Basic circuit for the measurement of the output conductance goss (method 2: two-voltmeter method)
77	Figure 40 – Circuit for the measurement of short-circuitforward transconductance gfs (Method 1: Null method)
78	Figure 41 – Circuit for the measurement of forward transconductance gfs (method 2: two-voltmeter method)
79	Figure 42 – Block diagram for the measurement of equivalent input noise voltage Figure 43 – Circuit for the measurement of equivalent input noise voltage
80	Figure 44 – Circuit diagram for the measurement of on-state drain-source resistance
81	Figure 45 – Circuit diagram
83	7 Acceptance and reliability 7.1 General requirements 7.2 Acceptance-defining characteristics Table 3 – Acceptance-defining characteristics for endurance and reliability tests
84	7.3 Endurance and reliability tests Figure 46 – Circuit for high-temperature blockings Figure 47 – Circuit for high-temperature gate bias
85	7.4 Type tests and routine tests Figure 48 – Circuit for intermittent operating life
86	Table 4 – Minimum type and routine tests for FETs when applicable
87	Bibliography

Additional information

Status	Definitive
Title	Semiconductor devices. Discrete devices – Field-effect transistors
Replaces	BS IEC 60747-8:2000, BS IEC 60747-8-4:2004
Publisher	BSI
Committee	EPL/47
Pages	88
Publication Date	2021-07-09
ISBN	978 0 539 03580 3
Standard Number	BS IEC 60747-8:2010+A1:2021
Identical National Standard Of	IEC 60747-8:2010/AMD1:2021
Descriptors	Field-effect transistors, Electrical insulation, Electronic equipment and components, Junction transistors, Integrated circuits, Semiconductor devices, Transistors
Amends	BS IEC 60747-8:2010
ICS Codes	31.080.30 - Transistors

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