BSI PD IEC TR 62878-2-9:2022
$102.76
Device embedding assembly technology – Guidelines. Concept of JISSO level in the electronic assembly technology industries
Published By | Publication Date | Number of Pages |
BSI | 2022 | 18 |
PDF Catalog
PDF Pages | PDF Title |
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2 | undefined |
4 | CONTENTS |
5 | FOREWORD |
7 | INTRODUCTION |
8 | 1 Scope 2 Normative references 3 Terms 4 Historical Concept of Jisso (JISSO) 4.1 Some examples of terms on Jisso/JISSO used in the past |
9 | Figures Figure 1 – Concept of Jisso/JISSO |
10 | 4.2 JISSO level versus Packaging Level (Interconnecting Level) 4.2.1 JISSO Level (typical) 4.2.2 Packaging Level |
11 | 5 Concept of typical terms and description on JISSO Level 5.1 JISSO/Jisso Figure 2 – Relation between JISSO Level versus Packaging Level Figure 3 – JISSO Level Concept (1)preliminarily introduced by JNAC in 2004 |
12 | 5.2 JISSO Level 0 – Intellectual information 5.3 JISSO Product Level 1 – Electronic element Figure 4 – JISSO Level Concept (2) |
13 | Figure 5 – Examples of JISSO Product Level 1 – Electronic element |
14 | 5.4 JISSO Product Level 2 – Electronic package 5.5 JISSO Product Level 3 – Electronic module Figure 6 – Examples of JISSO Product Level 2 – Electronic package |
15 | 5.6 JISSO Product Level 4 – Electronic unit Figure 7 – Examples of JISSO Product Level 3 – Electronic module |
16 | 5.7 J ISSO Product Level 5 – Electronic system Figure 8 – Example of JISSO Product Level 4 – Electronic unit Figure 9 – Examples of JISSO product Level 5 – Electronic system |
17 | Bibliography |