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BS EN 60679-1:1998:2004 Edition

$215.11

Quartz crystal controlled oscillators of assessed quality – Generic specification

Published By Publication Date Number of Pages
BSI 2004 86
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PDF Catalog

PDF Pages PDF Title
1 BRITISH STANDARD
2 National foreword
4 Foreword
Foreword to amendment A1
Foreword to amendment A2
5 Contents
9 1.1 Scope
1.2 Normative references
11 1.3 Order of precedence
2 Terminology and general requirements
2.1 General
2.2 Definitions
14 Figure 1 Example of the use of frequency offset
17 Figure 2 Typical frequency fluctuation characteristics
18 Figure 3 Characteristics of an output waveform
19 Figure 49 Clock signal with phase jitter
20 Figure 50 Phase jitter measures
Figure 51 Gaussian distribution of jitter
21 Figure 52 Jitter amplitude and period of jitter frequency
Figure 53 Jitter tolerance according to ITU-T G.825, ANSI T1.105.03, Telcordia GR-253 and ETSI EN 300462
22 2.3 Preferred values for ratings and characteristics
23 2.4 Marking
3 Quality assessment procedures
3.1 Primary stage of manufacture
3.2 Structurally similar components
24 3.3 Subcontracting
3.4 Incorporated components
3.5 Manufacturer’s approval
3.6 Approval procedures
25 3.7 Procedures for capability approval
3.8 Procedures for qualification approval
3.9 Test procedures
3.10 Screening requirements
3.11 Rework and repair work
26 3.12 Certified test records
3.13 Validity of release
3.14 Release for delivery
3.15 Unchecked parameters
4 Test and measurement procedures
4.1 General
4.2 Test and measurement conditions
27 4.3 Visual inspection
28 4.4 Dimensions and gauging procedures
4.5 Electrical test procedures
Figure 4 Test circuits for insulation resistance measurements
29 Figure 5 Test circuit for voltage proof test
30 Figure 6 Test circuit for oscillator input power measurement
Figure 7 Test circuit for oven and oscillator input power measurement
31 Figure 8 Test circuit for measurement of output frequency, method 1
32 Figure 9 Test circuit for measurement of output frequency, method 2
33 Figure 10 Test circuit for measurement of frequency/temperature characteristics
34 Figure 11 Thermal transient behaviour of typical oscillator
36 Figure 12 Generalized oscillator circuit
Figure 13 Test circuit for start-up behaviour and start-up time measurement
37 Figure 14 Typical start-up behaviour with slow supply voltage ramp
38 Figure 15 Definition of start-up time
Figure 16 Supply voltage waveform for periodical
39 Figure 17 Typical oscillator stabilization characteristic
40 Figure 18 Example of retrace characteristic
Figure 19 Test circuit for the measurement of output voltage
41 Figure 20 Test circuit for the measurement of pulse outputs
Figure 21 Test circuit for harmonic distortion measurement
42 Figure 22 Quasi-sinusoidal output waveforms
43 Figure 23 Frequency spectrum for harmonic distortion
45 Figure 24 Test circuit for the determination of isolation between output ports
46 Figure 25 Test circuit for measuring suppression of gated oscillators
Figure 26 Test circuit for tri-state disable mode output current
47 Figure 27 Test circuit for output gating time — tri-state
48 Figure 28 Test circuit for modulation index measurement
Figure 29 Modulation waveform for index calculation
49 Figure 30 Logarithmic signal amplitude scale
50 Figure 31 Test circuit to determine amplitude modulation sensitivity
Figure 32 Frequency spectrum of amplitude modulation distortion
51 Figure 33 Test circuit to determine pulse amplitude modulation
52 Figure 34 Pulse modulation characteristic
53 Figure 35 Test circuit for the determination of modulation input impedance
54 Figure 36 Test circuit for the measurement of f.m. deviation
55 Figure 37 Test circuit for the measurement of f.m. sensitivity
56 Figure 38 Test circuit for the measurement of frequency modulation distortion
57 Figure 39 Test circuit for the measurement of single-sideband phase noise
59 Figure 40 Typical noise pedestal spectrum
61 Figure 41 Test circuit for the measurement of incidental frequency modulation
62 Figure 42 Test circuit for method 1
63 Figure 43 Test circuit for method 2
64 Figure 44 Circuit modifications for methods 1 and 2
Figure 45 Time-domain short-term frequency stability of a typical�5�MHz precision oscillator
67 Figure 47 Characteristics of line impedance of stabilizing network
Figure 48 Circuit diagram of line impedance of stabilizing network
68 Table 1 Measuring sets bandwidths
69 Figure 54 Phase jitter measurement with sampling oscilloscope
70 Table 6 Fourier frequency range for phase noise test
71 Figure 55 Block diagram of a jitter and wander analyser according to ITU-T 0.172
Table 7 Standard bit rates for various applications
4.6 Mechanical and environmental test procedures
72 Table 2 Tensile force
Table 3 Thrust force
Table 4 Bending force
73 Table 5 Torque force
76 4.7 Endurance test procedure
78 Annex A (normative) Load circuit for logic drive
A.1 TTL and Schottky
Figure A.1 Circuit for TTL
Figure A.2 Circuit for Schottky logic
79 Table A.1 Values to be used when calculating
A.2 CMOS
A.3 ECL
80 Annex B (informative) Latch-up test
B.1 Definition
B.1.1 Latch-up
B.1.2 Test procedure
B.2 Test method
B.2.1 This test is destructive.
B.2.2 This test is applicable only to quartz crystal controlled oscillators containing CMOS integrated …
B.2.3 This test shall be performed in accordance with IEC 60748-2.
B.2.4 This test is a recommended test procedure. It is not a specification. No test limits are given.
B.2.5 This test is performed for characterization and inspection purposes only. It is not a production …
81 Annex C (normative) Electrostatic discharge sensitivity classification
C.1 Definition
C.1.1 Electrostatic discharge (ESD)
C.1.2 Test procedure
C.2 Test methods
82 Annex ZA (normative) Normative references to international publications with their corresponding European …
85 Bibliography
BS EN 60679-1:1998
$215.11