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BS IEC 63003:2015:2016 Edition

BS IEC 63003:2015:2016 Edition

$215.11

Standard for the common test interface pin map configuration for high-density, single-tier electronics test requirements utilizing IEEE Std 1505TM

Published By Publication Date Number of Pages
BSI 2016 174
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The scope of this standard is the definition of a pin map utilizing the IEEE 1505™ 1 receiver fixture interface (RFI). The pin map defined within this standard shall apply to military and aerospace automatic test equipment (ATE) testing applications.

PDF Catalog

PDF Pages PDF Title
4 CONTENTS
11 1. Overview
1.1 Scope
12 1.2 Purpose
1.3 Statement of the problem
13 2. Normative references
14 3. Definitions, acronyms, and abbreviations
3.1 Definitions
3.2 Specification terms
3.3 Acronyms and abbreviations
18 4. Common test interface requirements
4.1 Introduction
4.2 CTI open system requirements
19 4.3 CTI cost requirements
4.4 Vertical integration test support requirements
20 4.5 CTI configuration/interoperability requirements
4.6 Maintainability/end-user support requirements
4.7 Scaleable architecture requirements
22 4.8 Physical framework requirements
27 4.9 Reliability requirements
28 4.10 CTI connector footprint/parametric requirements
32 4.11 CTI pin map requirements
43 4.12 CTI pin map input/output configuration
44 Annex A (normative) Common test interface signal definitions for pin map
169 Annex B (informative) Bibliography
171 Annex C (informative) IEEE List of Participants

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BS IEC 63003:2015
$215.11