BS IEC 63504-2804:2023
$215.11
Software-Hardware Interface for Multi-Many-Core
Published By | Publication Date | Number of Pages |
BSI | 2023 | 88 |
PDF Catalog
PDF Pages | PDF Title |
---|---|
2 | undefined |
4 | Contents |
13 | Introduction |
14 | 1. Overview 1.1 Scope 1.2 Purpose 1.3 Word usage |
15 | 1.4 General introduction 1.4.1 Interface |
17 | 1.4.2 Software view—what is in and what is not |
18 | 1.4.3 XML 1.4.3.1 Data binding 1.4.3.2 Who creates SHIM XML 1.4.4 SHIM Editor 1.4.5 Reference authoring tools |
19 | 1.4.6 Changes introduced in SHIM 2.0 |
22 | 2. Normative references 3. Definitions 4. SHIM concepts 4.1 Topology—ComponentSet |
23 | 4.2 Inter-core communication(CommunicationSet |
24 | 4.3 Frequency and voltage(FrequencyVoltageSet |
25 | 4.4 Communication network utilization and contention(ContentionGroupSet |
26 | 4.5 Performance 4.5.1 General |
27 | 4.5.2 Latency and pitch |
28 | 4.5.3 Using triplets |
30 | 4.6 Power—PowerConfiguration 4.7 Vendor extensions |
31 | 4.8 Configuration 4.8.1 General 4.8.2 Common Configuration File (CCF) |
33 | 5. Roadmap 5.1 General |
34 | 5.2 Further componentization of SHIM XML 5.3 Hardware-related software properties 5.4 Schema refinement for smaller XML |
35 | 6. SHIM interface 6.1 shim20.xsd |
44 | 6.2 Conventions 6.3 Enumeration |
46 | 6.4 Shim 6.5 SystemConfiguration |
47 | 6.6 ComponentSet |
48 | 6.6.1 MasterComponent |
50 | 6.6.2 SlaveComponent 6.6.3 Cache |
51 | 6.6.4 AccessTypeSet 6.6.5 AccessType |
52 | 6.6.6 CommonInstructionSet |
53 | 6.6.7 FunctionalUnitSet 6.6.8 FunctionalUnitSetFile 6.6.9 FunctionalUnit 6.6.10 Instruction |
54 | 6.6.11 CustomInstruction |
55 | 6.6.12 InstructionInput 6.6.13 InstructionOperation |
56 | 6.6.14 InstructionOutput 6.6.15 Performance |
57 | 6.6.16 Latency 6.6.17 Pitch 6.7 FrequencyVoltageSet |
58 | 6.7.1 FrequencyDomain 6.7.2 VoltageDomain |
59 | 6.7.3 OperatingPointSet 6.7.4 OperatingPoint |
60 | 6.8 AddressSpaceSet 6.8.1 AddressSpace |
61 | 6.8.2 SubSpace 6.8.3 MemoryConsistencyModel |
62 | 6.8.4 MasterSlaveBindingSet 6.8.5 MasterSlaveBinding 6.8.6 Accessor |
63 | 6.8.7 PerformanceSet 6.9 CommunicationSet 6.9.1 FIFOCommunication |
64 | 6.9.2 SharedRegisterCommunication 6.9.3 InterruptCommunication |
65 | 6.9.4 SharedMemoryCommunication |
66 | 6.9.5 EventCommunication 6.9.6 ConnectionSet 6.9.7 Connection |
67 | 6.10 ContentionGroupSet 6.10.1 ContentionGroup |
68 | 6.10.2 Throughput 6.10.3 DataRate |
69 | 6.11 PowerConfiguration 6.11.1 PowerConsumptionSet |
70 | 6.11.2 PowerConsumption 6.12 VendorExtension |
71 | 6.12.1 SystemConfigurationFile |
72 | 6.12.2 PowerConfigurationFile 7. Use cases 7.1 Performance estimation: Auto-parallelizing compiler |
73 | 7.1.1 Using CommonInstructionSet 7.1.2 Using PerformanceSet 7.1.3 Using Cache |
74 | 7.1.4 Using FIFOCommunication 7.2 Tool configuration(RTOS configuration tool 7.2.1 Using ClockFrequency |
75 | 7.2.2 Using SubSpace 7.3 Hardware modeling 8. SHIM XML authoring rules and guidelines |
76 | 8.1 File name [rule] |
77 | 8.2 The naming of various objects [rule] 8.3 Level of detail and precision [guideline] 9. Common Configuration File (CCF) 9.1 Concept 9.1.1 Multiple hardware configuration |
78 | 9.1.2 Vendor-specific hardware features affecting SHIM objects 9.1.3 Configuration tool user interface |
79 | 9.2 Interface 9.2.1 XML schema |
81 | 9.2.2 Semantics 9.2.3 FormType 9.2.4 ConfigurationSet |
82 | 9.2.5 Configuration 9.2.6 Item 9.2.7 Expression |
83 | 9.2.8 Exp 9.2.9 Def 9.3 Examples 9.3.1 Generic |
84 | 9.3.2 Nested configuration 10. FAQ |